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:: Information ::

 

  • NEW Lab 7 & 8
  • StateCAD Tutorial
  • Lab Report & Grading Guidelines
  • Lab Timings are Tuesday to Friday from 2:30 to 5:30pm and Lab Location is Teaching Lab - E5 6005
  • Lab Reports are due electronically, same day as your lab, following week before 2:30pm. e.g If you do lab on Tuesday then the lab report is due following week Tuesday before 2:30pm

 


Welcome to SyDe192 2011 Lab Page

:: Course:: Digital Systems

Online Lab Sign-Up Sheet


:: Course Details ::

Lab Report Guidelines

2007 Course Professor's Page
2004 Course Professor's Page
(Must see link to get notes on how to write Lab reports,
course reading from Mano and last year midterm & final exams)

:: Manual ::
Lab Manual (NEW Lab7 & 8)


:: Digital Systems Kit ::
List of components in the kit and their Datasheets

:: Lab Schedule ::

Sign-up sheet is online at https://insyde.uwaterloo.ca/
Date
Week
Lab
May 3
1
No Lab
May 09
2
Lab No.1
May 16
3
Lab No.2
May 23
4
No Lab
May 30
5
Lab No.3
June 06
6
Lab No.4
June 13
7
No Lab - Midterm
June 20
8
Lab No.5
June 27
9
Lab No.6
July 04
10
No Lab
July 11
11
July 18
12
Lab No.8
Teaching Assitants


Manu Pallapa
Office: E2-1303 | Email: mgpallap@engmail

Plinio Morita
Office: E2-1303N | Email: pmorita@uwaterloo

Lawrence Wong
Email: l5wong@uwaterloo.ca

Apruva Narayan
Email: apurva.narayan@uwaterloo.ca


Pre-Lab Tutorials


Lab No. 1 - 4:
-> Boolean Algebra
-> Basic Gates & Functions
-> Integrated Circuits (Chips)

-> Switch Debouncing

-> Simple Adders

-> "Real World" DOs & DON'Ts

-> Flip-Flop
-> J-K & S-R Flip-Flops (Good reading for Lab No.2)

Lab No. 5-8:
-> Tutorial No.1 - Schematic Example
-> Tutorial No.2 - Verilog Example

-> Verilog Code Examples (Multiplexers, Flipflops, Multipliers.. )
-> FPGA for Fun Site

-> Programming a Timer in Verilog(Part 1)
-> Programming a Timer in Verilog(Part 2)


Lab Software

Lab No. 1 - 4:
-> B2 Logic Page
-> B2 Logic Manuals (Zip file)
-> B2 Logic Tutorials (New)

Lab No. 5 - 8:
-> Introduction to Xilinx ISE 8.1i
-> Download Xilinx ISE 8.1i (needs registration)
-> Do's and Don't of Verilog (New)
-> Verilog HDL quick Reference
-> Chipwin (Chipwriter Software)


Lab Hardware

Lab No. 1 - 4:
-> Working with SpeedWire tools -Only page#1
-> Digital Logic Probe

Lab No. 5 - 8:
-> Xilinx Spartan-3 Board and Schematic
-> Xilinx Spartan3 Board Starter Guide
-> Xilinx Spartan-3 Application Notes
-> Xilinx Spartan-3 DCMs (Digital Clock Managers)

LAB No.8 - PIC Microcontroller Stuff:
-> PIC Board Schematic
-> PIC Microcontroller Programming
-> PIC16C84 Sample Programs and Java Applets
-> HI-TECH PIC C Lite Free Compiler
-> PIC 16C84 Data Sheet


Some Past Project Videos

:: 2008 ::

Multiplier
Connect 4 Game
Snake Game
4-Bit ALU

:: 2009 ::

Microwave Timer
Helicopter Game
Towers of Hanoi Game
Count Down Timer
Guessing Game
Microprocessor
Pong Game
Tic-Tac-Toe Game
Train Project
Simple ALU

:: 2010 ::

ALU | Microwave Timer | Games
Group 1
Group 2
Group 3
Group 4
Group 5
Group 6
Group 7
Group 8
Group 9
Group 10
Group 11
Group 12
Group 13
Group 14
Group 15
Group 16
Group 17

 

 


Cool Links

Putting it all Together Switches to Gates to Circuits to Computers

MIT Lecture & Lab Notes on Digital Systems


Design & test your circuit using Digital Works

Excellent Reference Site for VERILOG HDL and Xilinx in general

stateCAD Excellent tutorial on StateCAD

Logisim - Free software tool for designing and simulating digital logic circuits

MMLogic - Free Multimedia Logic software

 


( * PDF files: To view our downloadable .pdf files you will need Adobe Acrobat Reader, if you do not have this you can download it for free from their site.)





( Contact me If you are having difficulty downloading any programs listed on this page and also for missing links ). This page has been updated on May 30, 2011